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CS501 - Advance Computer Architecture
Time: 4:30 PM
3 Mark Questions
Q1) Which one of the following subsystem has wide range of data transfer speed? Explain Briefly.
a) Memory Subsystem
b) I/O Subsystem
Q2) Identify and explain the working of the given DMA Configuration?
Q3) Find out the sign, significant and exponent form the following point number
-0.7 x 10^-4 (10 raise to pow -4)
Q4) Describe the term “Fragmentation” in context of Virtual Memory organization?
Q5) Consider structured RTL description of add immediate instruction into view, explain the purpose of following RTL description
[C <—A+c2(sign extend);]
5 Mark Questions
Q6) How many platters are require for a 80GB Disk. If there are 1024 Bytes/sector, 2048 sector per track and 4096 track per platter?
Q7) Suppose an I/O system with a single disk gets (on average) 200 I/O request/second and the average time for a disk to service an I/O request in 4ms. What is the utilization of the I/O system?
Q8) Explain any two(2) mechanisms for handling a generalized exception?
Q9) Write the steps involved in bit-pair recording algorithm for integer division?
Q10) Discuss the timing diagram for synchronous data communication?
thnks 4 sharing and what about mCQS
@Basarat Ali - What about MCQ's ?
my today paper
5 Mark Questions
Q1) How many platters are require for a 80GB Disk. If there are 1024 Bytes/sector, 2048 sector per track and 4096 track per platter? page 325
Q2) What is Address decoding and draw block diagram of address decoder?page244 handouts.
Q3) page 392
Wireless Transmission? 5marks
This is another effective medium for data transfer. Data is transferred in the form of
electromagnetic waves. It has the following features:
• Data rate is in Mbits/Sec.
• Very effective because of flexibility.
• Band width is much less than fiber.
write 0-addres machine and 1-addres machine same method as first assignment
Z= 4(a+ b) – 7(b +26)
Consider a 4 way set-associative cache with 256KB capacity and 32 byte lines a) How many sets are there in the cache? b) How many bits of address are required to select a set in cache?
my today ppr
1)Consider a DRAM with 1024 rows and a refresh time of 10ms. 3marks
a. Find the frequency of row refresh operations.
b. What fraction of the DRAM’s time is spent on refreshing if each refresh takes 100ns.
2)What is Address decoding and dra block diagram bna ne the 5marks pg244
3)Wireless Transmission 5marks
Consider a 2-way set-associative cache with 64KB capacity and 16 byte lines.
a. How many sets are there in the cache?
b. How many bits of address are required to select a set in the cache?
c. Repeat the above two calculations for a 4-way set-associative cache with
same size. pg375 5marks
Q1 FALSIM use of extention?(3)
.asmfa , .lstfa , binfa
Q2 What do you understand from network topologies write commonly use of network topologies?(3)
Q3 Write briefly NUXI problem?(3)
Q4 Write name of function performed on a typical memory cell?(3)
Q5 Write two data addressing?(3)
Q6 How many platter require for a 80GB disk if there are 1024 bytes/sector ,2048 sector per track and 4096 track per platter?(5)
Q7 Show all step involves in integer divition algorithm to divide 4510 by 510 ? (5)
Q8 Two types of Hardware interrupts? (5)
Q9 Wireless Tranmission ? (5)
Q10 Briefly two types of Hardware Interrupts? (5)