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# Assignment No. 02 Semester: Spring 2013 CS501: Advanced Computer Architecture,Total Marks: 20 Due Date: 06-05-13

Assignment No. 02
Semester: Spring 2013

Total Marks: 20

Due Date:  06-05-13

Instructions

It should be clear that your assignment will not get any credit if:

• The assignment is submitted after the due date.
• The submitted assignment does not open or file is corrupt.
• The assignment is found to be copied from the internet.
• The assignment is found to be copied from other student.
• The assignment submitted is not according to required file format (.doc).

Objective

The objective of this assignment is:

• To assess your overall understanding of Register Transfer Language and its notations.
• To assess your overall understanding of binary encoding of Computer Instructions.
• To assess your overall understanding of how data is being processed in Registers and memory.

Note:

• The assignment should be in .doc format.
• Assignment .02 covers lecture 6-10. You can also consult reference books for help.
• Students are advised to submit their assignment as early as possible in order to avoid any sort of inconvenience like Load shedding etc.

Question No 1:                                                 Marks 1+1+1+1+1=5

Q. 1.                        Briefly explain the following Register Transfer Language (RTL) notations:

1)    R [1]           ß  R [2] + (-56)

3)   R [4] ß  R [3] ~ R [1]

4)   IO[R [4]+1]ß  R[7]]

5)   M[R [1] +13]    ß   R [3]

Question No 2: Fill the given table by specifying binary encoded values against each instruction.

Marks 15

 Instruction Type OP-Code Ra Rb Rc C1 C2 Addressing mode RTL Description Condition PC status ori r2, r4, 9 jnz r1, [27] Out  7,R5(30) Load R[6]+99] Jmi  R3,[7]

Note: You may write N/A in a cell not relevant to any instruction.

GOOD LUCK!

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### Replies to This Discussion

binary values are required for op-code, Ra, Rb, Rc, C1 and C2

written values ko binary nmai convert ker lain e-g r2 = 010

iss discussion 373 views hony k bawajood kisi nay binary encoding ki bat note nahi ki  jo k question ki requirement hai........

@ BSSF  aap ny hand out  wakea hi pary hain.... u made me confuze in out and Load.

how do you chosse R7 in out and where from R1 comes in load instruction.

you have mentioned in you uploaded JPG file.

Here R6 should be in ra and 99 in C1

i am BFSS not BSSF

Load R[6]+99] this instruction is given in the assignment jis main destination register missing  hai, app koi bhi 3 bit register use ker k instruction complete ker lain. value obtained after adding contents of R6 and 99 will be stored in that register which u use.

as in handout page no 96

this instruction is to load a register from memory. for instance , the instruction r1, [r4+15] will add the constant 15 to the value in the register r4, access the memory location that corresponds to the number thus resulting, and assign the memory contents of this location to the register r1; this is denoted in Rtl by

R[1] ..> M[R4]+15]

Out  7,R5(30)

here first 7 means register no 7 R7

handout page no 93

the out instruction will move data from the register to the output device specified in the instruction

RANA USMAN out instruction is also given in handouts  page no 128  which is falcon E instruction of type C

kindly tell me how to write a source file and where.than how can we open file from FALCON A assembler.

then BFSS kindly ap he table ko correct kr k upload kr dain plzzzzzzzzzzzzz????

then BFSS kindly ap he table ko correct kr k upload kr dain plzzzzzzzzzzzzz????

marri    ......load 7, R5(30) aisi kio instruction given nai hai Load R[6]+99] thisinstruction is given in the assignment jis main destination register missing  hai, app koi bhi 3 bit register use ker k instruction complete ker lain. value obtained after adding contents of R6 and 99 will be stored in that register which u use.

ist instruction ..... as it  is type instruction therefore 9 will be written in C1, there is no C2 field in type three instruction.

binary values opcode and registers and constants

can you explain this

thanx

This instruction divides the value obtained by the concatenation of the register R[0] and R[6]  by the value of the register R[3]  and assign the result to the destination register R[5].

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