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Consider the below given table consisting of assembly instructions belonging to different processors.

Instruction

Processor

Hexadecimal Code

Behavioral RTL

JPL R5, [26]

Falcon - A

 

 

STS R7, R2 (100)

Falcon - E

 

 

STACC R4, 36

Modified EAGLE

 

 

DIV R2

EAGLE

 

 

SHIFTL R5, R2, 7

FALCON - A

 

 

Write machine code (in the hexadecimal representation) and behavioral RTL description for each instruction given in table.

Question # 02                                                                                               10 Marks

Consider the below given tables belonging to Modified EAGLE architecture.

  • Table 1 shows the contents of registers R1, R2 and memory labels A, B, C. The contents of memory labels are memory addresses.

Register

Contents

Memory Label

Address

R1

0015h

A

AB10h

R2

25CBh

B

3320h

 

 

C

AB0Eh

Table 1: Contents in Registers and Memory labels

  • Table 2 represents byte- aligned memory map and shows the value stored at each memory address.

Memory Address

Memory Contents

Memory Address

Memory Contents

AB0Eh

15h

3320h

CEh

AB0Fh

20h

3321h

55h

AB10h

56h

3322h

39h

AB11h

EFh

3323h

20h

Table 2: Contents at different memory addresses

  • Table 3 contains the instructions of an assembly program for Modified EAGLE. You are required to complete Table 3 by writing the values of destination operand, 16-bit address bus and 16-bit data bus after each instruction is executed.

Write the complete steps for calculating the values of Destination Operand, Data Bus & Address Bus after the execution of each instruction.

Instruction

Contents stored in Destination Operand

Data Bus

Address Bus

Calculation Steps

LDACC B

 

 

 

 

SUB R1

 

 

 

 

LDACC C

 

 

 

 

ADD R2

 

 

 

 

STACC A

 

 

 

 

Table 3: Data Bus and Address Bus Contents for Modified Eagle

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