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he reason of dominant position of digital circuit design is its ability to hide the behavior of underlying physical circuit and its working. The robustness of these abstractions has resulted in entire chip-level design flows which are based on careful hiding of circuit and layout details. These techniques worked well for last two decades in digital circuit design industry while scaling the circuits. As we are entering the Nano-tech era, do you think that this will remain applicable and will not face any challenge while scaling.

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