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CS302DigitalLogicDesignMidtermSolvedSubjectivePaperswithReferences.Pdf, 545 KB
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Cs 302 ka paper aj tha mera sara past paper sa aya h 2 long question filflop wal chap sa tha
CS302-FINALTERM+SOLVED+MCQS+WITH+REFRENCES+BY+MOAAZ
link
Cs302 paper aajka
90% mcqs moazz file se thay
subjective me memory se related question thay S-R latch se related thay.
Cs302 mostly from past papers (mcq's and subjective) from waqar and moaz files..
Long short...Flip flop diagrams. ...circuit diagrams...advantages of digital system
Cs302 final term paper. 40 mcqs Mcqs 80% from past. 5 question 3 marks k .5 question 5 marks k . 1.circuit given tha us ka function btna tha. 2.SRAM ka circuit bnna tha. 3.D/A converter ki resolution 3 bits circuit ki bits ki percentage btnai thi. 4.race condition and clock skew defination 5.mealy machine moore machine me difference. 6.using state reduction process and reduce tha state as possible .table given tha. 7.proformance characteristics of analog to digital converter k names likhny thy. 8.main difference b/w s-R latch and d latch .how we convert SR latch into D latch. 9.A'B+B'C +A'C sop expression map into karnugh map 10.write down the test vector table of up/down counter with given information. Inputs are clear ,X ,Clock Output Q0,Q1,Q2 If clear=0 then counter Reset to value 000 X= 1 then count up
today my cs 302 paper
20 mcqs from moaaz past file
binary code diya howa tha usko hexadecimal main convert karna tha
can we reverse counter true or not?
applications of j_k edge trigged flip flop
state reduction
3 bit up down counter ki state di hoi thi thi next state external input py find karni thi
4 bit down counter ki next 4 clock py state find karni thi
decimal to bcd diagram di hoi thi usko 7 bit main change karna tha
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