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Replies to This Discussion

How vesa organizes 16 color bits for every pixel?
One of the VESA defined modes is 4117 which is a 1024x768 mode with 16bit color and a linear frame buffer. The 16 color bits for every pixel are organized in 5:6:5 formats with 5 bits for red, 6 for green, and 5 for blue. This takes 32 shades of red and blue and 64 shades of green and 64K total possible colors. The 32bit linear frame buffer base address is available at offset 28 in the mode information buffer.

please share cs401 paper...............

important things to remember for CS401 Students
http://vusass.blogspot.com/2016/03/important-things-to-remember-for...

How vesa organizes 16 color bits for every pixel?

http://vusass.blogspot.com/2016/03/how-vesa-organizes-16-color-bits...

Today my CS401 paper
MCQZ 85% from Moazz file
12 Qz
1-Interrupt handling
2- Byte reserved for File Name and File Size
3-Data movement instructions for Sun Sparc
4-Write C code in assembly language....Multiply
5-Extented Write k instructions...AH, DL,CF,AX etc
6-How many types of interrupt produce debuggers.
7-Name of flag that are not for mathematical operations.
8-Explain iterrupt handling
9-Write assembly code of INT-21 de-allocation memory
10-When IRQ Conflict occur
11-Explain operation of peripheral devices

PLZ ANS THESE MSQ.

The interrupt call loads new values in CS, IP and ________ registers.

► DS
► SS
► FLAGS
► BP

After the execution of PUSH statement, what will happen ?

► SP is increased by 1

► SP is decreased by 1

► SP is increased by 2

► SP is decreased by 2

IBM PC has separate memory address space and peripheral address space. Memory address space is selected when _______ instruction is given to the processor.
► MOV
► DEC
► IN
► ADD

What is the size of a Sector of a standard 1.44MB Floppy disk having 80 tracks and 18 Sectors/track?
► 128 Bytes
► 256 Bytes
► 512 Bytes
► 1024 Bytes
The thread registration code initializes the PCB and adds it to the linked list. so that which will give it a turn?
► scheduler
► linker
► debugger
► assembler
Code Segment is associated to ________ register by default.
► IP
► SS
► BP
► CX

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