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Assignment no. 02 of CS501 has been uploaded on dated 03-12-2015. Due date to upload the solutions is 09-12-2015(09-december-2015).

Advance Computer Architecture (CS501)

Assignment # 02(GRADED)

Total marks = 20

                                                                                       Deadline Date = 09-December-2015

 

Please carefully read the following instructions before attempting the assignment.

 

Assignment Guidelines:

It should be clear that your assignment would not get any credit if:

 

  • The assignment is submitted after due date.
  • The submitted assignment does not open or file is corrupt.
  • The assignment is copied. Note that strict action would be taken if the submitted assignment is copied from any other student. Both students will be punished severely.

 

1)      You should consult recommended books to clarify your concepts as handouts are not sufficient.

2)      You are supposed to submit your assignment in .doc or docx format.Any other formats like scan images, PDF, Zip, rar, bmp etcwill not be accepted.

3)      You are advised to upload your assignment at least two days before due date.

 

 

Important Note:

 

Assignment comprises of 20 Marks. Note that no assignment will be accepted after due date via email in any case (whether it is the case of load shedding or emergency electric failure or internet malfunctioning etc.). Hence, refrain from uploading assignment in the last hour of the deadline, and try to upload Solutions at least 02 days before the deadline to avoid inconvenience later on.

 

For any query please contact: CS501@vu.edu.pk

 

Objective:

 

The objective of this assignment is to assess understanding of,

 

  • Registers
  • RTL notations
  • Use of arithmetic and logical operations in RTL

 

Question:

 

Write RTL(Register Transfer Language) notations against the given statements.

 

 

S. No.

Instruction Type

Description

RTL Notation

1

A logical instruction of type 4 of Falcon-A processor performing “AND”  operation

The contents of Register R3 and contents of Register R4 are bit-wise ‘ANDED’ and the result is placed inRegister R8

 

 

 

2

The multiply instruction of Falcon-A

The contents of register R1 multiplied with register R2 and then placed the result in register R3

 

3

The Falcon-A arithmetic add instruction

The memory location contains the contents of Register R5plus 15 are stored in register R6

 

4

The Falcon-A arithmetic subtract instruction of the type 4

The contents of Register R7 are subtracted by 10 and result is placed in memory location containing the contents of register R3 added by 4

 

5

A data transfer instruction of the Falcon-A  processor

The memory location given by the contents of the program counter plus 14 are transferred to  register R2

 

 


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solution

S. No.

Instruction Type

Description

RTL Notation

1

A logical instruction of type 4 of Falcon-A processor performing “AND”  operation

The contents of Register R3 and contents of Register R4 are bit-wise ‘ANDED’ and the result is placed in Register R8

 

 

(op<4..0>=8) R[8]ßR[3]&R[4]

2

The multiply instruction of Falcon-A

The contents of register R1 multiplied with register R2 and then placed the result in register R3

(op<4..0>=4) R[0]©R[3]ßR[1]*R[2]

3

The Falcon-A arithmetic add instruction

The memory location contains the contents of Register R5 plus 15 are stored in register R6

(op<4..0>=0) R[6]ßM[R[5]+[15]

4

The Falcon-A arithmetic subtract instruction of the type 4

The contents of Register R7 are subtracted by 10 and result is placed in memory location containing the contents of register R3 added by 4

(op<4..0>=2) M[R[3]+4ßR[7]-[10]

5

A data transfer instruction of the Falcon-A  processor

The memory location given by the contents of the program counter plus 14 are transferred to  register R2

(op<4..0>=6) R[2]ßPC+[14]

Solution:

 

 

 

Write RTL(Register Transfer Language) notations against the given statements.

 

 

S. No.

Instruction Type

Description

RTL Notation

1

A logical instruction of type 4 of Falcon-A processor performing “AND”  operation

The contents of Register R3 and contents of Register R4 are bit-wise ‘ANDED’ and the result is placed inRegister R8

 

 

 

 (OP<4…0>=0;R[r8]  <…….R[r3] &&[r4]

2

The multiply instruction of Falcon-A

The contents of register R1 multiplied with register R2 and then placed the result in register R3

 

(OP<4…0>=0);R[r3]  <……R[r1]*R[r2]

3

The Falcon-A arithmetic add instruction

The memory location contains the contents of Register R5plus 15 are stored in register R6

 

(OP<4…0>=0);R[r6]  <……R[r5]+[15]

4

The Falcon-A arithmetic subtract instruction of the type 4

The contents of Register R7 are subtracted by 10 and result is placed in memory location containing the contents of register R3 added by 4

(OP<4...0>=0); R[r3]+[4]  <----- R[r7]- [10]

5

A data transfer instruction of the Falcon-A  processor

The memory location given by the contents of the program counter plus 14 are transferred to  register R2

 

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