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I am uploading CS501 MCQs Moaz File with corrections, See the uploaded file In some questions Corrected Answer Choice is marked with Yellow highlight.

Best Of Luck...!

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thanks Faiza

Brothers and sisters:

                              My today's 501 paper was 100% from past papers uploaded on ning . So ratte mar lo sab. Bus 1 Mcq new tha and that was Which language is collection of bits?

2 marks mein aik use of reset or dusra which register holds address of next instruction tha.

3 marks mein structure of mov ra,rb or Arrangement of src operation tha.

5 marks mein remedies of data dependency or structure of copy ra,rb tha.

Best of luck.

Saira Batool gud keep it up & thanks for sharing ..best of luck for ur result & exam 

Attention Related Mid Term papers Spring 2013: All Fellows You don’t need to go any other site for current Mid Term papers Spring  2013, Because All discussed data/sharing of our members in this discussion are going from here to other sites. You can judge this at other sites yourself. So don’t waste your precious time with different links.

sis moazz bahi ki files me sy tha??????

Faiza thanks for sharing 

My Pleasure sir

sis moazz ki file ma say paper aya tha kya?  bata dain plz

jia khan thanks for sharing ur paper  best of luck for ur result 

Attention Related Mid Term papers Spring 2013: All Fellows You don’t need to go any other site for current Mid Term papers Spring  2013, Because All discussed data/sharing of our members in this discussion are going from here to other sites. You can judge this at other sites yourself. So don’t waste your precious time with different links.

mozz ki fils sa papers a rhya hain k ni.mujya hands out bhot bore ker rhya hain neied a jati ha handsout dakh k.plzz jin jin files sa papers a rhay hain is disssion ma ya link da dain ya post ker dain.

plz anyone tell me the ans of this q???

Q:in which stage of pipe-lining the effective memory address is calculated???

in alu operation stage

MID TERM PAPER CS-501 SPRING 2013

BEST OF LUCK

Q1:  write down the SRC stages ?   (3)

Q2: Write down the following SRC code in assembly language code?   (3)

       

Steps

RTL

T0-T2

Instruction fetch

T3

             A        R[rb]

T4

          C         A        R[rc]

T5

     R[ra]        c

 

Q3: Differentiate between executing machine instruction with and without the pipeline?    (3)

Q4: Compare unibus instruction of FALCON A with SRC w.r.t no. of bits of PC and IR?  (3)

Q5: writ ethe instruction fetch using the RTL execution process related with the timing steps requirements and data path implementation? (5)

Q6: Identify the Hazards in the following and also minimize them according to the certain

conditions?   (5)

200   sh1 r6,r3,5

204  str r7,30

208  sub r2 ,r4 , r5

212  add r1 , r2 , r3

216  id r7 ,48

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