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Q1                                                                                                 Marks = 15

Intel has introduced a number of multi-core products in recent years. You have to explain the general structure of the Intel Core i7 with the help of a Block Diagram.

 

Note: Explain the block diagram in your own language.

Spring%202012_CS501_5.doc


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Intel Core i7 a Block Diagram.



tell me which pic is best thanks

        • Intel Core i7 


Supports two forms of external communications to other chips:


DDR3 Memory Controller brings the memory controller for the DDR (double data rate) main memory onto the chip with the memory controller on the chip the Front Side Bus is eliminated Quick Path Interconnect (QPI) enables high-speed communications among connected processor chips


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Intel R CoreTM i7 Processor Extreme Edition
Intel Core I7-960 [33, 40] is a 45nm technology general-purpose processor that
does ”everything” well. It targets high-end desktop, server, and workstation systems.
Concerning the computational power, it has 4 cores with four-way out-of-order
execution model and can use up to two threads per core, thus enabling fairly good
multitasking and multithreading. With a maximal frequency of 3.33GHz, it can
deliver up to 55GFLOPS. The high price for large programming flexibility is paid
15
with power consumption of maximal 130W. The core architecture is standard Intel
64 architecture [37], while the microarchitecture is based on Intel Microarchitecture
(Nehalem) [36]. The main architectural features (that Intel is very proud of)
are the scalability (dynamical scalability and design-scalable microarchitecture)
and energy/performance efficiency. Block diagram of the processor is presented in
Many levels of memory (memory hierarchy) are used to hide memory latencies.
It has three levels of cache (L1- 32KB of instruction and 32KB of data cache, L2-
256KB for data and instructions, L3- 8MB) and integrated memory controller that
can support memory bandwidth of 25GB/s, which is also the maximal bandwidth
supported by the interconnect. The amount of supported DRAM is outstanding
24GB [40].
The communication among the cores and between the cores and DRAM is done
via Intel QPI point-to-point link capable of providing 25GB/s.

u are great

Intel Core i7 block diagram

See the attached file please

Attachments:

thanks

its confusing ,there r many intel core i7 diagrams.plz any one tell kon si diagram ass mein use kerni hey or explantion kon si hogi

also in intel core i7 there are many versions and which description we entered in our assignments????

Please tell

Thanks

only general structure, no need to specify the version.

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